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| 第30行： |
第30行： |
| | ---- | | ---- |
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| − | === 最小系统设计要求 === | + | === 硬件设计要求 === |
| | + | 请参考 |
| | | | |
| | [[LTT-MX6-SOM100硬件设计指导]] | | [[LTT-MX6-SOM100硬件设计指导]] |
| | | | |
| − | {| class="wikitable"
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| − | |-
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| − | ! Pin Number !! CPU Pin Name !! Description !! Direction !! 电压
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| − | |-
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| − | | 2|| rowspan=5|5VIN || rowspan=5|核心板5V供电 || rowspan=5|I ||rowspan=5| 5V
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| − | |-
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| − | | 4
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| − | |-
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| − | | 6
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| − | |-
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| − | | 8
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| − | |-
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| − | | 10
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| − | |-
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| − | | 12 || rowspan=3|3P3V || rowspan=3 |评估板电源使能信号|| rowspan=3 |O|| rowspan=3 |3.3V
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| − | |-
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| − | | 14
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| − | |-
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| − | | 16
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| − | |-
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| − | | rowspan=2|28 || rowspan=2|SW_IN || 开关机信号输入（MX6_ONOFF） || I || rowspan=3 |3.3V
| |
| − | |-
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| − | | 休眠信号（GPIO_19） || I
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| − | |-
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| − | | 39 || PRO_B || 复位CPU || I
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| − | |-
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| − | | 26 ||VSNVS_3V0 || RTC电源 || I || 3V
| |
| − | |}
| |
| − | :'''电源'''
| |
| − | 核心板使用DC降压芯片（RT8070）来进行电源的管理，输入电压为：DC4.1V~5.5V,推荐使用5V。
| |
| − | :'''复位信号POR_B和开关机引脚SW_IN'''
| |
| − | 复位信号POR_B在系统启动时必须拉高，如果需要手动复位，只需在推荐电路中的nRST引脚上使用一个连接到地的按键即。注意，复位信号是敏感信号，所以nRST引脚到按键的走线要尽量短，并且走线需作包地处理，避免干扰影像系统的稳定性。
| |
| − |
| |
| − | 开关机引脚SW_IN，可以对系统进行开关机操作和休眠唤醒操作，
| |
| − | 系统休眠后，拉低此引脚，系统会进行唤醒操作；
| |
| − | 长按此引脚，系统会关机，然后再长按此引脚，系统会开机。
| |
| − |
| |
| − | 以下为这两个引脚底板设计推荐电路图：
| |
| − | [[文件:FW01.png|左]]
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| − | [[文件:FW02.png|居中]]
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| − | :'''RTC电源'''
| |
| − | VSNVS_3V0此引脚为CPU内部RTC供电的引脚，可以使用外部电池供电（3V），此处的电源还用于核心板内部BOOT上拉，如不使用外部的电池，需外部供电，电平3V或者3.3V也可。
| |
| − | :'''USBOTG接口'''
| |
| − | 核心板提供1路USB OTG和1路USB HOST信号，USB OTG用于固件的下载，USB HOST用于与外界的连接，诸如键盘、鼠标、U盘等。USB OTG必须引出，请使用者谨记。
| |
| − |
| |
| − | USB OTG的供电（USB_OTG_VBUS）和USB HOST的供电（USB_H1_VBUS）需要外界来提供，电压为5V。
| |
| − | :'''调试串口UART1'''
| |
| − | 核心板使用UART1来作为调试串口，此接口作为打印调试信息的接口必须引出，请使用者谨记。
| |
| − | :'''BOOT选择'''
| |
| − | 核心板内部使用拨码开关的方式来进行BOOT的选择。
| |
| − | 推荐将BOOT1拉低，然后使用拨码的方式来操作BOOT0，来选择是否进入烧录模式：
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| − |
| |
| − | 按下按键进入烧录模式；
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| − |
| |
| − | 松开按键系统通过设置好的熔丝方式启动。
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| − |
| |
| − | 目前核心板使用熔丝的方式来启动系统。
| |
| − | [[文件:BOOT.png|左]]
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| − | [[文件:BOOT02.png|左]]<br>
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| − | :'''功能模块接口'''
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| − | LTT_MX6_SOM100系列核心板采用了灵活的开关机方式，并且针对低功耗的要求添加了对评估板电源的控制信号，用户可以根据需要自行设计。(注意：默认使用的管脚以灰色填充。)
| |
| − | :'''电源接口'''
| |
| − | {| class="wikitable"
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| − | |-
| |
| − | ! Pin Number !! CPU Pin Name !! Description !! Direction !! 电压
| |
| − | |-
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| − | | 2 || rowspan=5 |5V_IN|| rowspan=5 |核心板5V供电 || rowspan=5 |I || rowspan=5 |5V
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| − | |-
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| − | | 4
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| − | |-
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| − | | 6
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| − | |-
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| − | | 8
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| − | |-
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| − | | 10
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| − | |-
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| − | | 12 || rowspan=3 |PWR_EN|| rowspan=3 |评估板电源使能信号 || rowspan=3 |O || rowspan=3 |3.3V
| |
| − | |-
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| − | | 14
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| − | |-
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| − | | 20
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| − | |-
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| − | |}
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| − | :'''HDMI接口'''
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| − | {| class="wikitable"
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| − | |-
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| − | ! Pin Number!! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
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| − | |-
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| − | | 102 || Positive Data Signal 0 || HDMI_D0P || K6 || I/O || rowspan=10 |2.5V
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| − | |-
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| − | | 104 || Negative Data Signal 0 || HDMI_D0M || K5 || I/O
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| − | |-
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| − | | 94 || Positive Data Signal 1 || HDMI_D1P || J4 || I/O
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| − | |-
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| − | | 96 || Negative Data Signal 1 || HDMI_D1M || J3 || I/O
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| − | |-
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| − | | 86 || Positive Data Signal 02 || HDMI_D2P || K4|| I/O
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| − | |-
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| − | | 88 || Negative Data Signal 2 || HDMI_D2M || K3 || I/O
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| − | |-
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| − | | 98 || Positive Clock Signal || HDMI_CLKP || J6 || I
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| − | |-
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| − | | 100 || Negative Clock Signal || HDMI_CLKM || J5 || I
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| − | |-
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| − | | 92 || Hot Plug Detection Signal || HDMI_HPD || K1 || I/O
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| − | |-
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| − | | 90 || CEC line between source and sink || HDMI_CEC_IN || W4 || I/O
| |
| − | |}
| |
| − | :'''设计要求'''
| |
| − | HDMI的接口芯片要靠近HDMI接口，布局时要与接口在一条直线上，保证信号线短且直，为了避免信号不连续，走线拐角采用圆弧或者45度走线替代90度走线。尽量减少过孔数目，尽可能将过孔靠近HDMI连接器放置。几对差分信号要做等长，尽量做到1Mil的对内等长，组内严格等长。控制HDMI的差分信号对阻抗为100±15%ohm。
| |
| − | :'''LVDS接口'''
| |
| − | {| class="wikitable"
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| − | |-
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| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
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| − | |-
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| − | | 135 || rowspan=8 |LVDS0 Data Signals ||LVDS0_TX0_P || U1 || I/O || rowspan=10 |2.5V
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| − | |-
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| − | | 133 || LVDS0_TX0_N || U2 || I/O
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| − | |-
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| − | | 147 || LVDS0_TX1_P || U3 || I/O
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| − | |-
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| − | | 145 || LVDS0_TX1_N || U4 || I/O
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| − | |-
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| − | | 129 || LVDS0_TX2_P || V1 || I/O
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| − | |-
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| − | | 131 || LVDS0_TX2_N || V2 || I/O
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| − | |-
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| − | | 139 || LVDS0_TX3_P || W1 || I/O
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| − | |-
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| − | | 137 || LVDS0_TX3_N || W2 || I/O
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| − | |-
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| − | | 143 || LVDS0 Positive Clock Signal || LVDS0_CLK_P || V3 || I/O
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| − | |-
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| − | | 141 || LVDS0 Negative Clock Signal || LVDS0_CLK_N || V4 || I/O
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| − | |-
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| − | | 134 || rowspan=8 |LVDS1 Data Signals || LVDS1_TX0_P || Y2 || I/O || rowspan=10 |2.5V
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| − | |-
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| − | | 136 || LVDS1_TX0_N || Y1 || I/O
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| − | |-
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| − | | 132 || LVDS1_TX1_P || AA1 || I/O
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| − | |-
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| − | | 130 || LVDS1_TX1_N || AA2 || I/O
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| − | |-
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| − | | 142 || LVDS1_TX2_P || AB2 || I/O
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| − | |-
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| − | | 144 || LVDS1_TX2_N || AB1 || I/O
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| − | |-
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| − | | 140 || LVDS1_TX3_P || AA4 || I/O
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| − | |-
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| − | | 138 || LVDS1_TX3_N || AA3 || I/O
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| − | |-
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| − | | 148 || LVDS1 Positive Clock Signal || LVDS1_CLK_P || Y4 || I/O
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| − | |-
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| − | | 146 || LVDS1 Negative Clock Signal || LVDS1_CLK_N || Y3 || I/O
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| − | |-
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| − | |}
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| − | :'''设计要求'''
| |
| − | 为了尽量减少偏差，LVDS差分对之间走线要求等长处理，组内尽量做到严格等长。尽量减少过孔及其它导致信号不连续的行为。任何寄生负载，如电容，必须等量存在于每对差分对中。为了避免信号不连续，走线拐角采用圆弧或者45度走线替代90度走线。控制LVDS的差分信号对阻抗为100±15%ohm。
| |
| − | :'''RGB显示接口'''
| |
| − | {| class="wikitable"
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| − | |-
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| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
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| − | |-
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| − | | 197 || rowspan=24 |IPU DISP Data Signal || DISP0_DAT0 || P24 || IO || rowspan=28 |3.3V
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| − | |-
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| − | | 171 || DISP0_DAT1 || P22 || IO
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| − | |-
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| − | | 170 || DISP0_DAT2 || P23 || IO
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| − | |-
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| − | | 169 || DISP0_DAT3 || P21 || IO
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| − | |-
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| − | | 174 || DISP0_DAT4 || P20 || IO
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| − | |-
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| − | | 193 || DISP0_DAT5 || R25 || IO
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| − | |-
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| − | | 166 || DISP0_DAT6 || R23 || IO
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| − | |-
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| − | | 195 || DISP0_DAT7 || R24 || IO
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| − | |-
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| − | | 167 || DISP0_DAT8 || R22 || IO
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| − | |-
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| − | | 189 || DISP0_DAT9 || T25 || IO
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| − | |-
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| − | | 172 || DISP0_DAT10 || R21 || IO
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| − | |-
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| − | | 161 || DISP0_DAT11 || T23 || IO
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| − | |-
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| − | | 191 || DISP0_DAT12 || T24 || IO
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| − | |-
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| − | | 165 || DISP0_DAT13 || R20 || IO
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| − | |-
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| − | | 185 || DISP0_DAT14|| T2 || IO
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| − | |-
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| − | | 163 || DISP0_DAT15 || T22 || IO
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| − | |-
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| − | | 157 || DISP0_DAT16 || T21 || IO
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| − | |-
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| − | | 187 || DISP0_DAT17 || U24 || IO
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| − | |-
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| − | | 181 || DISP0_DAT18 || V25 || IO
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| − | |-
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| − | | 162 || DISP0_DAT19 || U23 || IO
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| − | |-
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| − | | 164 || DISP0_DAT20 || U22 || IO
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| − | |-
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| − | | 168 || DISP0_DAT21 || T20 || IO
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| − | |-
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| − | | 183 || DISP0_DAT22 || V24 || IO
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| − | |-
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| − | | 159 || DISP0_DAT23 || W24 || IO
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| − | |-
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| − | | 179 || IPU DISP Clk Signal || DISP0_CLK || N19 || O
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| − | |-
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| − | | 199 || IPU DISP HSYNC Signal || DISP0_HSYNCH || N25 || O
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| − | |-
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| − | | 175 || IPU DISP VSYNC Signal || DISP0_VSYNCH || N20 || O
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| − | |-
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| − | | 173 || IPU DISP Data Ready Signal || DISP0_DRDY || N21 || O
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| − | |}
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| − | :'''设计要求'''
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| − | 组内信号线要求做等长处理。
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| − | :'''SATA硬盘接口'''
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| − | {| class="wikitable"
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| − | |-
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| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
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| − | |-
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| − | | 54 || Positive Receive Signal || SATA_RXP || B14 || I || rowspan=4|2.5V
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| − | |-
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| − | | 56 || Negative Receive Signal || SATA_RXN || A14 || I
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| − | |-
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| − | | 60 || Positive Transmit Signal || SATA_TXP || A12 || O
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| − | |-
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| − | | 58 || Negative Transmit Signal || SATA_TXN || B12 || O
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| − | |}
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| − | :'''设计要求'''
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| − | SATA差分信号对之间走线要求做等长处理，采用尽可能小封装的耦合电容，电容的位置要尽量靠近连接器，差分信号的阻抗控制在100ohm。
| |
| − | :'''USB接口'''
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| − | {| class="wikitable"
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| − | |-
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| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
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| − | |-
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| − | | 69 || rowspan=2|USB HOST || USB_H1_DN || F10 || IO || rowspan=4|
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| − | |-
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| − | | 71 || USB_H1_DP || E10 || IO
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| − | |-
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| − | | 66 || rowspan=2|USB OTG || USB_OTG_DN || B6 || IO
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| − | |-
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| − | | 68 || USB_OTG_DP || A6 || IO
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| − | |-
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| − | | '''72''' || rowspan=2|USB_OTG_ID || '''GPIO01''' || T4 ||rowspan=2| I ||rowspan=6|3.3V
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| − | |-
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| − | | 184 || ENET_RX_ER || W23
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| − | |-
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| − | | '''47''' || rowspan=2|USB_OTG_OC || '''EIM_DATA21''' || H20 || rowspan=2| I
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| − | |-
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| − | | 122 || KEY_COL4 || T6
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| − | |-
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| − | | '''43''' || rowspan=2|USB_OTG_PWR || '''EIM_DATA22''' || E23 || rowspan=2|O
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| − | |-
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| − | | 124 || KEY_ROW4 || V5
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| − | |}
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| − | :'''设计要求'''
| |
| − | 尽可能缩短走线长度，尽可能的减少在USB高速信号线上的过孔数和拐角，从而可以更好的做到阻抗的控制，避免信号的反射。在布线时，要做到差分信号走线的长度匹配。控制USB差分信号对之间的布线间距，要确保90 ohm的差分阻抗。
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| − | :'''SD接口'''
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| − | {| class="wikitable"
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| − | |-
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| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
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| − | |-
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| − | | 180 || rowspan=6|SD1 Signal || SD1_WP || T2 || I || rowspan=6|3.3V
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| − | |-
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| − | | 156 || SD1_CLK || D20 || O
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| − | |-
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| − | | 17 || SD1_DATA0 || A21 || IO
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| − | |-
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| − | | 151 || SD1_DATA1 || C20 || IO
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| − | |-
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| − | | 153 || SD1_DATA2 || E19 || IO
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| − | |-
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| − | | 177 || SD1_DATA3 || F18 || IO
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| − | |-
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| − | | 20 || rowspan=7|SD2 Signal || SD2_CD_B || R6 || I || rowspan=7|3.3V
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| − | |-
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| − | | 50 ||SD2_CMD || F19 || IO
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| − | |-
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| − | | 46 || SD2_CLK || C21 || O
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| − | |-
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| − | | 44 || SD2_DATA0 || A22 || IO
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| − | |-
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| − | | 52 || SD2_DATA1 || E20 || IO
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| − | |-
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| − | | 42 || SD2_DATA2 || A23 || IO
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| − | |-
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| − | | 48 || SD2_DATA3 || B22 || IO
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| − | |-
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| − | | 57 || rowspan=6|SD3 Signal || SD3_CMD || B13|| IO || rowspan=6|3.3V
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| − | |-
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| − | | 59 || SD3_CLK || D14 || O
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| − | |-
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| − | | 63 || SD3_DATA0 || E14 || IO
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| − | |-
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| − | | 61 || SD3_DATA1 || F14 || IO
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| − | |-
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| − | | 55 || SD3_DATA2 || A15 || IO
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| − | |-
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| − | | 53 || SD3_DATA3 || B15 || IO
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| − | |}
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| − | :'''PCIE接口'''
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| − | {| class="wikitable"
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| − | |-
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| − | !Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
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| − | |-
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| − | | 74 || Positive Receive Signal || PCIE_RXP || B2 || I || rowspan=4|2.5V
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| − | |-
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| − | | 76 || Negative Receive Signal || PCIE_RXM || B1 || I
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| − | |-
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| − | | 78 || Positive Transmit Signal || PCIE_TXP || B3 || O
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| − | |-
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| − | | 80 || Negative Transmit Signal || PCIE_TXM || A3 || O
| |
| − | |}
| |
| − | :'''设计要求'''
| |
| − | PCIE信号为差分信号，布线时要注意减少有害串扰的影响和电磁干扰（EMI）的影响。
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| − | :'''AUD音频接口'''
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| − | 核心板提供音频信号，可以使用WM8962芯片进行音频编解码，这是一款低功耗、高性能的立体音频编解码器。它支持单端输入，录音通道支持自动增量控制（AGC），且内置滤波电路。同时支持两路单端输出和两路差分高功率输出。I2C信号用于配置芯片寄存器，I2S用于音频数据传输，系统默认使用I2C1和I2S3来连接WM8962，如需使用请参照我司的参考设计，请使用者谨记。
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| − | {| class="wikitable"
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| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
| |
| − | |-
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| − | | 110 || rowspan=4|AUD3 Signal || AUD3_TXC || N1 || IO || rowspan=4|2.5V
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| − | |-
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| − | | 116 || AUD3_TXFS || N4 || IO
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| − | |-
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| − | | 112 || AUD3_TXD || P2 || IO
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| − | |-
| |
| − | | 114 || AUD3_RXD || N3 || IO
| |
| − | |-
| |
| − | | 50 || rowspan=2|AUD4_RXC || '''SD2_CMD''' || '''F19''' || rowspan=2|IO || rowspan=24|3.3V
| |
| − | |-
| |
| − | | 162 || DISP0_DATA19 || U23
| |
| − | |-
| |
| − | | 44 || rowspan=2|AUD4_RXD || '''SD2_DATA0''' || '''A22''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 159 || DISP0_DATA23 || W24
| |
| − | |-
| |
| − | | 46 || rowspan=2|AUD4_RXFS || '''SD2_CLK''' || '''C21''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 181 || DISP0_DATA18 || V25
| |
| − | |-
| |
| − | | 48 || rowspan=2|AUD4_TXC || '''SD2_DATA3''' || '''B22'''
| |
| − | |-
| |
| − | | 164 || DISP0_DATA20 || U22
| |
| − | |-
| |
| − | | 42 || rowspan=2|AUD4_TXD|| '''SD2_DATA2''' || '''A23''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 168 || DISP0_DATA21 || T20
| |
| − | |-
| |
| − | | 52 || rowspan=2|AUD4_TXFS|| '''SD2_DATA1''' || '''E20''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 183 || DISP0_DATA22 || V24
| |
| − | |-
| |
| − | | 40 || rowspan=2|AUD5_RXC|| '''EIM_DATA2''' || '''G22''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 185 || DISP0_DATA14 || U25
| |
| − | |-
| |
| − | | 125 || rowspan=2|AUD5_RXD || '''KEY_ROW1''' || '''U6''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 162 || DISP0_DATA19 || U23
| |
| − | |-
| |
| − | | 38 || rowspan=2|AUD5_RXFS || '''EIM_DATA24''' || '''F22''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 165 || DISP0_DATA13 || R20
| |
| − | |-
| |
| − | | 121 || rowspan=2|AUD5_TXC || '''KEY_COL0''' || '''W5''' || rowspan=2|IO
| |
| − | |-
| |
| − | |157 || DISP0_DATA16 || T21
| |
| − | |-
| |
| − | | 123 || rowspan=2|AUD5_TXD || '''KEY_ROW0''' || '''V6''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 187 || DISP0_DATA17 || U24
| |
| − | |-
| |
| − | | 127 || rowspan=2|AUD5_TXFS || '''KEY_COL1''' || '''U7''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 181 || DISP0_DATA18 || V25
| |
| − | |}
| |
| − | :'''设计要求'''
| |
| − | 保持音频信号线尽可能短，并尽量远离干扰源，信号线做到组内等长。
| |
| − | :'''以太网接口'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
| |
| − | |-
| |
| − | | 198 || rowspan=2|ENET_MDC || '''ENET_MDC''' || '''V20''' || rowspan=2|O || rowspan=13|3.3V
| |
| − | |-
| |
| − | | 21 ||KEY_COL2 || W6
| |
| − | |-
| |
| − | | 188 ||rowspan=2| ENET_MDIO || '''ENET_MDIO''' || '''V23''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 127 || KEY_COL1 || U7
| |
| − | |-
| |
| − | | 196 || rowspan=9|Enet Signal || ENET_RXD0 || W21 || I
| |
| − | |-
| |
| − | | 182 || ENET_RXD1 || W22 || I
| |
| − | |-
| |
| − | | 190 || ENET_CRS_DV || U21 || I
| |
| − | |-
| |
| − | | 200 || ENET_TXD0 || U20 || O
| |
| − | |-
| |
| − | | 194 || ENET_TXD1 || W20 || O
| |
| − | |-
| |
| − | | 192 || ENET_TX_EN || V21 || O
| |
| − | |-
| |
| − | | 186 || ENET_nRST || R1 || O
| |
| − | |-
| |
| − | | 178 || ENET_REF_CLK || V22 || O
| |
| − | |-
| |
| − | | 180 || ENET_nINT || T2 || I
| |
| − | |}
| |
| − | :'''CAN总线接口'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
| |
| − | |-
| |
| − | | 119 || rowspan=3|CAN1_RX || '''GPIO08''' || '''R5''' || rowspan=3|I || rowspan=10|3.3V
| |
| − | |-
| |
| − | | 90 ||KEY_ROW2 || W4
| |
| − | |-
| |
| − | | 59 || SD3_CLK || D14
| |
| − | |-
| |
| − | | 117 || rowspan=3|CAN1_TX || '''CAN1_TX''' || '''R3''' || rowspan=3|O
| |
| − | |-
| |
| − | | 21 || KEY_COL2 || W6
| |
| − | |-
| |
| − | | 57 || SD3_CMD || B13
| |
| − | |-
| |
| − | | 124 || rowspan=2|CAN2_RX || '''KEY_ROW4''' || '''V5''' || rowspan=2|I
| |
| − | |-
| |
| − | | 61 || SD3_DATA1 || F14
| |
| − | |-
| |
| − | | 122 || rowspan=2|CAN2_TX || '''KEY_COL4''' || '''T6''' || rowspan=2|O
| |
| − | |-
| |
| − | | 63 || SD3_DATA0 || E14
| |
| − | |}
| |
| − | :'''设计要求'''
| |
| − | 布线时要注意控制收发器转换后差分对信号等长。注意给CAN总线匹配终端电阻。
| |
| − | :'''SPI接口'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
| |
| − | |-
| |
| − | | 27 || '''CSPI2_RDY''' || '''EIM_A25''' || '''H19''' || '''I''' ||rowspan=11|3.3V
| |
| − | |-
| |
| − | | 25 || rowspan=2|'''CSPI2_CS0''' || '''EIM_RW''' || '''K20''' || rowspan=2|'''IO'''
| |
| − | |-
| |
| − | | 181 || '''DISP0_DATA18'''|| '''V25'''
| |
| − | |-
| |
| − | | 43|| CSPI4_MISO || CSPI4_MISO || E23 || IO
| |
| − | |-
| |
| − | | 45 || CSPI4_MOSI || CSPI4_MOSI || G23 || IO
| |
| − | |-
| |
| − | | 49 || CSPI4_RDY || CSPI4_RDY || F23 || I
| |
| − | |-
| |
| − | | 47 || CSPI4_CLK || CSPI4_CLK || H20 || IO
| |
| − | |-
| |
| − | | 41 || rowspan=2|CSPI4_CS0 || '''EIM_DATA29''' || '''J19''' || rowspan=2|IO
| |
| − | |-
| |
| − | | 23 ||EIM_DATA20 || G20
| |
| − | |-
| |
| − | | 38 || CSPI4_CS2|| EIM_DATA24 || F22 || IO
| |
| − | |-
| |
| − | | 40 || CSPI4_CS3 || EIM_DATA25 || G22 || IO
| |
| − | |}
| |
| − | :'''12C接口'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! Voltage
| |
| − | |-
| |
| − | | 106 || I2C1 Serial Data || I2C1_SDA || N6 || IO || rowspan=2|2.5V
| |
| − | |-
| |
| − | | 108 || I2C1 Serial Clock || I2C1_SCL || N5 || IO
| |
| − | |-
| |
| − | | 160 || I2C2 Serial Data || I2C2_SDA || T7 || IO || rowspan=2|3.3V
| |
| − | |-
| |
| − | | 158 || I2C2 Serial Clock || I2C2_SCL || U5 || IO
| |
| − | |-
| |
| − | | 120 || I2C2 Serial Data || I2C3_SDA || T3 || IO || rowspan=2|3.3V
| |
| − | |-
| |
| − | | 118 || I2C2 Serial Clock || I2C4_SCL || R6 ||IO
| |
| − | |}
| |
| − | :'''CSI摄像头接口'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! 电压
| |
| − | |-
| |
| − | | 107 || rowspan=8| IPU CSI Data Signal|| CSIO_DAT12 || M2 || I || rowspan=11|2.5V
| |
| − | |-
| |
| − | | 105 || CSIO_DAT13 || L1 || I
| |
| − | |-
| |
| − | | 99 ||CSIO_DAT14 || M4|| I
| |
| − | |-
| |
| − | | 115 || CSIO_DAT15 || M5 || I
| |
| − | |-
| |
| − | | 97 || CSIO_DAT16 || L4 || I
| |
| − | |-
| |
| − | | 95 || CSIO_DAT17 || L3 || I
| |
| − | |-
| |
| − | | 103|| CSIO_DAT18 || M6 || I
| |
| − | |-
| |
| − | | 101 || CSIO_DAT19 || L6 || I
| |
| − | |-
| |
| − | | 113 || IPU CSI Hsync Signal || CSI0_HSYNCH || P4 || I
| |
| − | |-
| |
| − | | 109 || IPU CSI Vsync Signal|| CSI0_VSYNCH || N2 || I
| |
| − | |-
| |
| − | | 111 || IPU CSI Pixclk Signal || CSI0_PIXCLK || P1 || I
| |
| − | |-
| |
| − | |}
| |
| − | :'''设计要求'''
| |
| − | CSI-MCLK和CSI-PCLK需要各自包地，并保证较少的换层连接到摄像头连接器，保证连接器周围信号地的完整性
| |
| − | :'''MIPI摄像头接口'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! 电压
| |
| − | |-
| |
| − | | 29 || rowspan=8|D-Phy Differential Data ||CSI_D3M || F1 ||I ||rowspan=10|2.5V
| |
| − | |-
| |
| − | | 31 || CSI_D3P || F2 || I
| |
| − | |-
| |
| − | | 33 || CSI_D2M || E1 || I
| |
| − | |-
| |
| − | | 35 || CSI_D2P || E2 || I
| |
| − | |-
| |
| − | | 77 || CSI_D1M || D1 || I
| |
| − | |-
| |
| − | | 79 || CSI_D1P || D2 || I
| |
| − | |-
| |
| − | | 81 || CSI_D0M || E4 || I
| |
| − | |-
| |
| − | | 83 || CSI_D0P || E3 || I
| |
| − | |-
| |
| − | | 85 || rowspan=2|D-Phy Differential Clock || CSI_CLKM || F4 || I
| |
| − | |-
| |
| − | | 87 || CSI_CLKP || F3 || I
| |
| − | |}
| |
| − | :'''设计要求'''
| |
| − | MIPI信号线下方一定要有参考层（推荐用地层），且一定要保证参考层的连续性。MIPI线对之间以及线对与线对之间的长度误差注意控制，MIPI信号线尽量不要打过孔。
| |
| − | :'''UART接口'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! 电压
| |
| − | |-
| |
| − | | 89 ||rowspan=2|UART1 Data || UART1_RX || M3 || I || rowspan=2|2.5V
| |
| − | |-
| |
| − | | 91 || UART1_TX || M1 || O
| |
| − | |-
| |
| − | | 45 || rowspan=2|UART2_CTS|| '''EIM_D28''' || '''G23'''|| rowspan=2|O || rowspan=8|3.3V
| |
| − | |-
| |
| − | | 57 || SD3_CMD || B13
| |
| − | |-
| |
| − | | 41 || rowspan=2|UART2_RTS || '''EIM_D29''' || '''J19''' || rowspan=2|I
| |
| − | |-
| |
| − | | 59 || SD3_CLK || D14
| |
| − | |-
| |
| − | | 32 || rowspan=2|UART2_RXD || '''EIM_D27''' || '''E25''' || rowspan=2|I
| |
| − | |-
| |
| − | | 119 || GPIO08 || R5
| |
| − | |-
| |
| − | | 30 || rowspan=2|UART2_TXD || '''EIM_D26''' || '''E24''' || rowspan=2|O
| |
| − | |-
| |
| − | | 117 || GPIO07 || R3
| |
| − | |-
| |
| − | | 34 || rowspan=3|UART3_CTS || '''EIM_D23''' || '''D25''' || rowspan=3|O || rowspan=8|3.3V
| |
| − | |-
| |
| − | | 73 || EIM_D30 || J20
| |
| − | |-
| |
| − | | 53 || SD3_DATA3 || B15
| |
| − | |-
| |
| − | | 36 || rowspan=3|UART3_RTS || '''EIM_D31''' || H21 || rowspan=3|O
| |
| − | |-
| |
| − | | 49 || EIM_EB3 || F23
| |
| − | |-
| |
| − | | 19 || SD3_RESET || D15
| |
| − | |-
| |
| − | | 40 || rowspan=2|UART3 Data ||UART3_RXD|| G22 ||I
| |
| − | |-
| |
| − | | 38 || UART3_TXD ||UART3_TXD || O
| |
| − | |-
| |
| − | | 95 || UART4_CTS || UART4_CTS || L3 || O || rowspan=6|3.3V
| |
| − | |-
| |
| − | | 97 || UART4_RTS || UART4_RTS || L4 || I
| |
| − | |-
| |
| − | | 123 || rowspan=2|UART4_RXD || '''KEY_ROW0''' || KEY_ROW0 || rowspan=2|I
| |
| − | |-
| |
| − | | 105 || CSI0_DATA13 || L1
| |
| − | |-
| |
| − | | 121 || rowspan=2|UART4_TXD || '''KEY_COL0''' || W5 || rowspan=2|O
| |
| − | |-
| |
| − | | 107 || CSIO_DATA12 || M2
| |
| − | |-
| |
| − | | 101 || rowspan=2|UART5_CTS || '''CSIO_DATA19''' || '''L6''' || rowspan=2|O || rowspan=8|3.3V
| |
| − | |-
| |
| − | | 124 || KEY_ROW4 || V5
| |
| − | |-
| |
| − | | 103 || rowspan=2|UART5_RTS || '''CSIO_DATA18''' || '''M6''' || rowspan=2|I
| |
| − | |-
| |
| − | | 122 || KEY_COL4 || T6
| |
| − | |-
| |
| − | | 125 || rowspan=2|UART5_RXD || '''KEY_ROW1''' || '''U6''' || rowspan=2|I
| |
| − | |-
| |
| − | | 115 || CSIO_DATA15 || M5
| |
| − | |-
| |
| − | | 127 || rowspan=2|UART5_TXD || '''KEY_COL1''' || '''U7''' || rowspan=2|O
| |
| − | |-
| |
| − | | 99 || CSIO_DATA14|| M4
| |
| − | |}
| |
| − | :'''PWM功能'''
| |
| − | {| class="wikitable"
| |
| − | |-
| |
| − | ! Pin Number !! Description !! CPU Pin Name !! CPU !! Direction !! 电压
| |
| − | |-
| |
| − | | 167 || PWM Function OUT 1 || PWM1_OUT || R22 || O || rowspan=4|3.3V
| |
| − | |-
| |
| − | | 189 || PWM Function OUT 2 || PWM2_OUT || T25 || O
| |
| − | |-
| |
| − | | 151 || PWM Function OUT 3 || PWM3_OUT || C20 || O
| |
| − | |-
| |
| − | | 18 || PWM Function OUT 4 || PWM4_OUT || B21 || O
| |
| − | |-
| |
| − | |}
| |
| − | <br/>
| |
| | | | |
| | ---- | | ---- |
| | | | |
| | === 核心板机械尺寸图 === | | === 核心板机械尺寸图 === |
| − | [[文件:JXCCT.png|左]] | + | [[文件:JXCCT.png|500px]] |
| | | | |
| | | | |
| − | [[文件:JXKCT.png|左]] | + | [[文件:JXKCT.png|500px]] |
